Instructor: Vern Solberg
Course Overview: This half-day tutorial provides PCB design engineers and manufacturing professionals with guidance on developing next-generation semiconductor packaging solutions, including 2D, 2.5D, and 3D System-in-Package (SiP) technologies and ultra-high-density interposers. As advanced electronics increasingly rely on chiplet-based architectures and heterogeneous integration, this course explores design strategies, manufacturing considerations, and reliability challenges associated with high-density packaging technologies. Participants will gain insight into evolving package architectures, interposer technologies, and practical design approaches for future electronic systems.
Topics Include: • Evolution of advanced array packaging and industry standards
- BGA, FBGA, die-size packages, and chiplet package technologies
• 2D, 2.5D, and 3D semiconductor die and package stacking - Wire-bond memory stacking
- Homogeneous and heterogeneous package integration
- Package-on-package technologies and risk considerations
• PCB design guidelines for high-density array packaging - Multiple-die and stacked package methodologies
- 2.5D high-density BGA applications
• HDI and UHDI substrate and interposer design - Organic, silicon, polymer, and glass-based interposer technologies
- Fabrication methods and design considerations
• Wafer-level and panel-level packaging technologies - Fan-out wafer-level packaging (FOWLP)
- Fan-out panel-level packaging (FOPLP)
- Mold-first manufacturing approaches
• Heterogeneous integration and hybrid/direct bond interconnect technologies
Who Should Attend: This course is designed for PCB designers, design engineers, semiconductor packaging professionals, manufacturing engineers, and test specialists involved in advanced electronic product development. It is also beneficial for OEM, ODM, EMS, and OSAT professionals seeking a deeper understanding of next-generation packaging technologies and their impact on design, manufacturing, and supply chain strategies.
